The thing that fascinated me the most during the thesis has been the nanofabrication of magnetic memories, nanostructures and devices. Believe me I did not even know that the tools, facilities and everything I will go through in the next lines even existed. My strong foundations in theoretical physics developed during the BSc and MSc kept me abstracted until I first landed in Spintec.
Nanofabrication processes manipulate materials and devices at the atomic or molecular scale. This is why a clean room is an environment which is controlled with minimal contaminants. In nanofabrication processes, even the smallest particles can cause significant defects. Clean rooms ensure the purity and maintain standards for air quality, temperature and humidity. This pristine environment is crucial for the success and reliability of nanotechnology applications, from semiconductor manufacturing to advanced medical devices.
Image credits, Spintec
Clean rooms often have cutting edge tools to carry out the nanofabrication processes. Among them, we can find microscopes (high resolution optical or electron microscopes) for inspecting nanosized components or structures. For semiconductor fabrication, we can also find photolithography equipment to transfer patterns onto silicon wafers (just draw the shape of our devices or electrodes). High precision material removals are done with etching machines (material is removed from certain areas to isolate our devices) and depositions tools can cover a surface with thin films (we can add layers of materials with high precision in thicknesses). Finally, there is always a chemical bench where we mainly use acetone, isopropanol, developers and light sensitive materials for coating.
The following lines are meant to quickly describe the steps I carried out to pattern the magetic tunnel junctions (MTJs) described in my page dedicated to summarize my thesis. I patterned MTJs in 100 mm Si wafers using a well established procedure in the MRAM group in Spintec. For different reasons, I also patterned pillars in SiN substrates, which adds complexity and modifications in the recipe.
Figure from my thesis manuscript
Firstly, membranes were defined at the beginning of the process such that the whole MRAM process was performed on a substrate. The fragility of the SiN membranes made me modify several steps of the process and leads to extreme care in handling the wafer in the different steps of the fabrication process.
I share some optical microscope and SEM images of the wafer state after some process steps. After the bottom contact definition in Figure a, the membrane is not visible due to the lack of contrast caused by the stack. Figure b is an optical microscope image after the lithography step for the accuflo thinning showing the membrane and both accuflo lithographies. The dark dot is a pillar. The accuflo is a polymer used to encapsulate the pillar and avoid the contact between both electrodes. Figure c is a SEM image of the accuflo opening showing how the pillar comes out. Lastly, Figure d is a SEM image zoom of the pillar ready to be contacted. The color code is added to follow the zooming.
Figure from my thesis manuscript
The facilities I had available made me discover how powerful the current technologies are in terms of the fabrication of nanosized devices. The semiconductor industry relies on some of these (and even more sofisticated) tools that allow to automatize the patterning of the chips we all use in our devices. Such nanofabrication processes can last months, and everything must be meticulously tracked, tested and reported. Flaws in the process can damage batches of wafers with the consequent loss of time, resources and supplies.
Pd: Don't take a selfie in a clean room ;)